1. Field of the Invention
The present invention relates to a unit for carrying out a comparison operation at a high speed, and relates more particularly to a comparison operating unit which is suitable for being stored in a microprocessor or the like for carrying out various kinds of graphic processing.
2. Description of the Related Art
When a so-called pipeline processing is to be carried out, instructions are processed separately at individual stages in the pipeline because the instructions are given continuously. Therefore, when branch instructions are executed and branch conditions are met, it becomes necessary to once abandon all the instructions in the pipeline and fetch the instructions again when the instructions are to be executed. Thus, when there exist a large number of branch instructions, the operation efficiency of the pipeline processing has been reduced.
In order to eliminate the above-described problem, according to the description of the Japanese Utility Model Registration Unexamined Publication No. JP-A-2-144626, each time when a conditional branch instruction is given, an address in which the branch instruction exists, a branch destination address and a branch instruction length are once stored in a table. Then, in the case of executing the branch instruction, when the stored branch instruction has been pre-fetched again, an address of the succeeding instruction and a predicted branch destination address are set in a register, and the instruction which exists in a branch destination is selectively fetched based on a result of branching, to thereby restrict an occurrence of a disturbance in the pipeline processing.
According to the above-described prior art technique, however, when a conditional branch instruction has been given, it is not possible to fetch the instruction in the branch destination until the branch result has been calculated, with a result that an idle time of processing is generated in the pipeline processing. For example, in processing for frequently executing comparison instructions, an increase in the time required for the processing due to the idle time has been a serious problem.
As an example of the above case, in the technology of three-dimensional computer graphics, there exists a depth buffer test, a stencil test, an alpha test, etc. for determining whether pixels are drawn in a picture within a polygon or not. In order to carry out these tests, a comparison operation of two data is executed based on comparison conditions assigned by the programmer. The same processing is to be executed regardless of the comparison conditions, that is, regardless of whether the comparison conditions are met or not. The details of the graphics processing are described in "OpenGL Programming Guide (Japanese version)", pp. 301-308 (Addison-Wesley, issued by Seiunsha), for example.
When comparison conditions can be optionally determined by a predetermined number and the processing to be executed does not depend on the comparison conditions as described above, it becomes necessary to carry out a processing for obtaining a result of the comparison operation by branching the processing by the number of the comparison conditions. Thus, when the processing is to be carried out by using the prior-art technique, the total idle processing time of the pipeline processing becomes longer along with the increase in the number of the branch instructions.
In conclusion, there is a limit to the improvement in the processing efficiency so long as the branch instructions are being executed. Further, even if the processing after the branching remains unchanged, it is necessary to describe the same execution contents at individual branch destinations at the time of coding a program. This has resulted in a problem that the program becomes huge and this leads to an increase in the memory consumption volume.